The big picture: The semiconductor industry is approaching a significant milestone as TSMC prepares to expand the physical scale of its chip packaging technology. At its recent North American Technology Symposium, the company detailed plans for a new generation of CoWoS (Chip-on-Wafer-on-Substrate) technology, enabling the assembly of multi-chiplet processors much larger than those currently in production.
A hot potato: TSMC has repeatedly said that funding a new chip-making venture outside Taiwan is very expensive for numerous reasons. However, a new analysis tries to debunk the company's alleged financial issues with building new plants in other parts of the world.
In context: Once the undisputed leader in semiconductor manufacturing, Intel now finds itself at a critical juncture as its foundry operations face significant financial challenges. It remains uncertain whether a deal with TSMC can rescue Intel's foundry business, but without it the company – better known in its heyday as "Chipzilla" – must find a way to address its manufacturing challenges and financial losses.
Bottom line: Intel and TSMC are both gearing up to launch their respective 18A and N2 process nodes, each offering significant advancements. On one side, Intel claims 18A will deliver much higher generational performance gains. On the other, TSMC is emphasizing N2's impressive transistor density. But which one is truly superior? As it turns out, the answer isn't so straightforward.