Rumor mill: A leaked list of seven Nova Lake-S desktop processors gives us the clearest look yet at how Intel plans to sell its first consumer chips with a massive last-level cache. The upcoming flagship appears to be the Core Ultra 9 4970K BFC, positioned above the Core Ultra 9 4950K. The list suggests "BFC" will mark the large-cache models across three tiers.
At first glance, the four LP-E cores look exclusive to the BFC models, however Intel leaker Jaykihn says the standard chips have them too, along with vPro support, but the table simply omits them. A previous 4950K CPU-Z leak supports this: it showed 28 cores, not 24. Without the LP-E cores, the 4950K's 8P+16E layout would match today's Core Ultra 9 285K, which would make for a clean generational comparison.
The newly leaked table comes from LC Tech Leaks, the same source behind the 4950K CPU-Z screenshot a few weeks ago. The naming is still unofficial, but it supports the idea that Nova Lake will move Core Ultra desktop chips to four-digit model numbers as shown below:
| Model | Cores (P+E+LP-E) | Big cache | TDP | iGPU |
|---|---|---|---|---|
| Core Ultra 9 4970K BFC | 8+16+4 | Yes | 125W | 32 EU |
| Core Ultra 9 4950K | 8+16 | No | 125W | 32 EU |
| Core Ultra 9 4900 BFC | 6+12+4 | Yes | 65W | 32 EU |
| Core Ultra 7 4870K BFC | 8+12+4 | Yes | 125W | 32 EU |
| Core Ultra 7 4850K | 8+12 | No | 125W | 32 EU |
| Core Ultra 5 4650K | 6+12 | No | 125W | 32 EU |
| Core Ultra 5 4650KF | 6+12 | No | 125W | None |
Intel's internal documents have called the technology bLLC, for "big last-level cache." BFC could be the final retail branding that would compete against AMD's well-established 3D V-Cache technology. Nobody knows what "BFC" stands for, but enthusiasts have already filled in the blank with their own guesses.
The configurations in the table line up with earlier reports, a recent leak pointed us to 22-core Nova Lake-S parts with up to 144MB of cache, and the 6P+12E+4LP-E Core Ultra 9 4900 BFC matches that layout. A 65W big-cache chip is an interesting entry on the list. It suggests Intel wants cache-heavy gaming parts beyond the enthusiast flagship.
Back in 2024 we ran a feature "Would 3D V-Cache Help Intel CPUs?," where we tested Raptor Lake with E-cores disabled and clocks locked, extra L3 cache did little for gaming because those chips were mostly limited by clock speed. The assumption is that Nova Lake's new P-core design architecture can actually use the extra cache.
How Intel attaches the cache remains unclear. Clearwater Forest server CPUs place its cache in the base tile beneath the compute dies, roughly how AMD's third-gen X3D chips put V-Cache under the CCD. Some observers think Intel could instead place a cache tile beside the compute tile on the ring bus, but that would complicate coherency and latency. Power is another open question, since earlier reports put a 28-core bLLC part close to 300W at PL2.
None of this is confirmed. Nova Lake-S will use the new LGA 1954 socket and 900-series chipsets. Intel has committed to launching Nova Lake by the end of 2026, with most indications pointing to a CES 2027 unveiling. The larger dual-compute-tile models, with up to 52 cores, are expected to follow later.